Wednesday, April 29, 2015

Renesas Electronics Demos 200 Gbps Packet Processing and Classification Engine

  Renesas Electronics Corporation announced it is "demonstrating its Deterministic Deep Database Search Engine interoperating with Xilinx's FPGA-based packet processor

 .. Developed in close collaboration with Xilinx, this solution supports up to 200 Gbps of packet processing and includes advanced classification capabilities with over one million rules for application identification and access control lists to address the explosion of traffic and data generated by the Internet of Things (IoT) sensors and devices.

The Renesas S-series network search engine provides two high-speed Interlaken Look-Aside ports and two independent memory banks enabling multi-threaded configurations. Based on over ten years of Renesas' extensive experience in ternary content addressable memory (TCAM) technology, the search database is fully scalable, while throughput and latency remain deterministic without the need for software realignment.

Xilinx FPGA board (left) and Renesas
evaluation board (right)

See "Renesas Demonstrates Deterministic Deep Database Search Engine Interoperating with Xilinx's FPGA-based Packet Processor at Japan IT Week 2015" - here.

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