Radisys and EZchip to Offer Integrated Service-Aware Solution

Radisys FlowEngine
TDE-1000

Radisys and EZchip Semiconductor announced the "integration path towards EZchip’s next-generation NPS network processor with Radisys’ FlowEngine™ intelligent traffic distribution solutions [see "Radisys Introduces Service-Aware Load Balancer" - here] for Communications Service Providers (CSPs). 

The telco-centric, carrier-grade solution provides CSPs with a service-aware integrated solution of hardware, software and professional services, enabling CSPs to guarantee services and roll-out new services in an SDN environment – at the scale required for millions of subscribers around the world".

Related post: "Network Processors - are they Here to Stay?" - here.

Radisys and EZchip’s integrated solution delivers guaranteed support to millions of subscribers and flows with complete flexibility, statefulness and service assurance.

• Service Availability: The solution provides needed scalability to support millions of subscribers and flows; subscribers can count on service being available – when and where they need it

• Service Visibility: The solution provides network analytics, giving CSPs visibility into their network to identify and drive services, enforce intelligent policies and guarantee Service Level Agreements. The ability to guarantee service requires guaranteed state. Together, Radisys and EZchip deliver stateful awareness of flow classification in one compact, integrated system with less processing and minimized latency compared to alternate solutions.
   
• Service Flexibility: The solution delivers unmatched flexibility. Its feature-rich software libraries, open source SDN interfaces, Layer 2-7 processing and professional services to deliver customization as needed allow CSPs the flexibility to rapidly introduce new services and generate new revenue

See "Radisys and EZchip Announce Partnership to Solve Mobile Operators’ Service Scalability Challenges" - here.

EZchip - New 20 Gbps SSL Proxy Solution for Traffic Visibility and Monitoring

EZchip Semiconductor unveiled its "Transparent SSL Proxy solution designed to enable traffic visibility for network monitoring and network security equipment. Targeted for integration by Network Monitoring and Security Appliance OEMs, the application delivers performance levels of 20Gbps of SSL Proxy throughput and over 30,000 new connection setups per second .. a Transparent SSL Proxy inspector is used to give IT staff the needed visibility into all traffic that is transiting through their network ..the Transparent SSL Proxy software solution is available now for evaluation.

The EZchip Transparent Proxy SSL software is a robust SSL inspection solution that incorporates the production-grade MatrixSSL™ security stack from INSIDE Secure as well as EZchip’s tStack high-performance user-space TCP/IP stack. The software has been designed and optimized to take advantage of the architectural and acceleration features of EZchip’s TILE-Gx processor to deliver scalability across the entire TILE-Gx processor family at industry-leading performance per watt.

The EZchip Transparent SSL Proxy software application may be paired with EZchip’s TILEmpower™ family of appliances or TILEncore™ intelligent PCIe adapters to accelerate time-to-market for OEMs and system integrators looking for a white-box solution. Vendors may also choose to design their own appliance hardware with the TILE-Gx family of processors and deploy the EZchip SSL Proxy software along with other advanced software functions on the same device".

See "EZchip Introduces High Performance Transparent SSL Proxy Application for Network Monitoring and Security Vendors" - here.

Intelligent Merger: EZchip to Acquire Tilera for $130M

EZchip Semiconductor announced that it has "..signed a definitive agreement to acquire Tilera Corporation, a privately-held US-based company that develops high-performance multi-core processors, intelligent network interface cards and white-box appliances for data-center networking equipment .. under the terms of the agreement, EZchip will pay Tilera’s stockholders up to $130 million in cash; of which $50 million is payable at closing and up to an additional $80 million is payable subject to the attainment of certain future performance milestones.

EZchip currently expects the acquisition to be neutral to slightly dilutive in 2014 and accretive in 2015 to earnings per share on a non-GAAP basis. Following the closing, Devesh Garg, the CEO of Tilera, will serve as EZchip’s President in charge of all US operations.

The acquisition represents a significant move for EZchip. In particular .. Doubles EZchip’s total available market (TAM): To $2 billion, consisting of NPUs, multi-core CPUs, smart network adapters and appliances, for the data-center and telecom markets [related chart below, from November 2012]

Related posts:

• Network Processors - are they Here to Stay? - here
• EZchip Unveiled 400-Gb wire-speed, C-Programmable, NPU - here
• Tilera and Qosmos Offer Integrated DPI Solution - here
• Tilera: New Network Processor with 5Gbps DPI - here.

See "EZchip to Acquire Tilera, a Leader in High-Performance Multi-Core Processors" - here.

Network Processors - are they Here to Stay?

According to recent announcements it seems the even DPI products, with their intense packet processing, are going towards NFV and virtualization in general purpose servers.

Vendors do state that it will take time (see "Allot Launched the New Service Gateway" - here and "Sandvine CEO Bullish on IBM Relations; SDN and NFV will Take Time" - here) - but is this the end of Network (or Packet) Processors?

A few months old white paper, by By Bob Wheeler [pictured], Senior Analyst, The Linley Group "..examines traditional network-processor (NPU) architectures, technology trends driving new requirements, limitations of NPUs and CPUs, and new architectures that overcome these challenges 

.. Admittedly, the distinction between an NPU and a multi-CPU processor with networking  accelerators is becoming less obvious 

...To meet carriers’ emerging demands, OEMs and merchant vendors alike must develop bold new network-processing architectures. These designs must blend the favorable attributes of traditional network processors—high performance and power efficiency—with the greater flexibility of multicore processors based on general-purpose CPUs. 

Ericsson is leading this charge with the industry’s first true C-programmable processor capable of running Linux and delivering 200Gbps throughputs. EZchip should be the first merchant NPU vendor to offer similar capabilities. Although equipment based on these new designs must still be proven in the field, we see nothing less than a new era of network processing emerging"

The paper presents the new NP from Cisco (2nd Gen QFP), Ericsson (SNP 4000 - see "Ericsson's New Network Processor - for Internal Use Only" - here) and EZChip (NPS-400 - see "EZchip Unveiled 400-Gb wire-speed, C-Programmable, NPU" - here).

See "A New Era of Network Processing" - here.

EZchip Unveiled 400-Gb wire-speed, C-Programmable, NPU

EZchip unveiled the ".. NPS – Network Processor for Smart networks .. through its breakthrough architecture, NPS breaks the barriers imposed by traditional NPUs and CPUs. It enables extremely high-performance C-programmable layer 2-7 processing, and provides networking vendors with an architecture that scales as more advanced services at higher speeds are required over time".

"..Central to the NPS are its innovative CTOPs (C-programmable Task Optimized Processors). These processing engines build on EZchip’s extensive NPU experience and are designed specifically for data-plane processing. The optimized design allows the integration of 256 such processors, each with 16 threads, for a total of 4K virtual processing engines .. The NPS’ efficient design allows incorporating into the chip not only a great number of cores but also EZchip’s market-proven hardware traffic manager, a task optimized memory architecture, and numerous hardware accelerators for efficient table lookups, application recognition and security. The end result is a very powerful network processor with superior power efficiency and integration".

"The NPS provides great packet processing simplicity and flexibility through C-based programming, a standard toolset, support of the Linux® operating system, large code space, and a run-to-completion or pipeline programming style .. The NPS features cores that are highly optimized for packet processing and leverage EZchip’s vast packet processing and applications experience, a market-proven traffic manager, hardware accelerators for security and DPI (Deep Packet Inspection) tailored for efficiency and performance, on-chip search engines including TCAM with scaling through algorithmic extension to external low-cost low-power DRAM memory, a fabric adaptor to enable direct connection to a chassis backplane and switch fabric, and a multitude of interfaces providing an aggregated bandwidth of 800-Gigabits per second including 10-, 40- and 100-Gigabit Ethernet, Interlaken and PCI Express interfaces".

See "EZchip Introduces NPS, a New Breed of C-Programmable NPU that Enables the Next Wave of High-Performance Smart Carrier and Data-Center Networks" - here.

DPI Announcements: NetLogic and EZchip Collaborate to Achieve IPv6 100G Performance

 

Two of the leading vendors of network processors, EZchip (here) and NetLogic Microsystems announced that ".. the companies are collaborating to deliver the industry’s highest performance, merchant, packet-processing solutions for IPv6-ready Terabit class systems.  By optimizing and implementing exclusive operational modes in both EZchip’s NP-4 100Gbps network processor (NPU) and NetLogic Microsystems’ NL11k knowledge-based processor, the companies are enabling customers to achieve enhanced performance and functionality when using both the processors together when compared to alternative solutions .. the growing requirement for deep-packet inspection throughout the network is driving an unprecedented need for knowledge-based processors with significantly higher performance and database capacity .. The companies have achieved broad design success across leading Tier One OEMs adopting the 100G NP-4 NPU and the industry-leading NL11k knowledge-based processor .. This powerful 100G combined solution from NetLogic Microsystems and EZchip is available immediately".

See "NetLogic Microsystems and EZchip Collaborate to Deliver High-Performance Packet Processing Solutions for Terabit Class Systems" - here.

EZchip's 200 Gbps Network Processor Planned for the End of 2012

 

EZchip Semiconductor provided ".. product details of its NP-5 network processor. NP-5 is a 200-Gigabit network processor (NPU) with integrated 200-Gigabit traffic management for building ultra-dense 10GE, 40GE and 100GE port line cards in switches and routers. The NP-5, currently in design, will provide a natural scale-up path for customers that use EZchip’s NP-4 100-Gigabit processor .. the NP-5 will be manufactured in a 28nm process and is scheduled to sample at the end of 2012 .. The NP-5 will enable line cards that feature multiple 40 and 100-Gigabit ports as well as dozens of 10-Gigabit ports. Through its versatility and rich feature set, the NP-5 will serve a wide variety of carrier and data center applications".

See "EZchip Discloses Product Details of Its NP-5 200-Gigabit Network Processor" - here.

See also "How to Build DPI Products? (Part I - CPU Architecture)" - here.

Other network processors covered recently - Cavium (here), NetLogic/RMI (here), Netronome (here),