Showing posts with label Architecture. Show all posts
Showing posts with label Architecture. Show all posts
Monday, October 4, 2010
How to Build DPI Products? (Part II - System Design)
After we saw the recommendations for CPU design - let’s go one step up in the food chain - to the system design. Radisys published a new white paper on DPI and how to implement it using the ATCA (Advanced Telecommunications Computing Architecture).
See "DPI: Deep Packet Inspection Motivations, Technology, and Approaches for Improving Broadband Service Provider ROI" - here and the document - here.
"Depending on the DPI application, an appropriate mix of CPUand/or packet processor blades may be used. DPI application providers may have substantial investment in existing code that is not easily ported to a packet processor or simply may not require absolute real time and packet forwarding capabilities needed for the DPI application, such as when the application is required to be in the path. The application may also be compute or storage/memory intensive. Packet processing capabilities in CPU-based systems are also improving and benefit from overall advances in CPU design (see charts below)"
Among the DPI vedors using ATCA are Allot (here), Procera (here) and NSN (here) as well as Alcatel-Lucent for its PCRF product (here). See also "DPI Market: GENBAND OEMs Procera"- here for the possible OEM benefits of ATCA.
Labels:
Architecture,
ATCA,
DPI,
Radisys
How to Build DPI Products? (Part I - CPU Architecture)
2 new documents, from Radisys and Netronome, may help DPI vendors to design high performance products. This post covers the latter, to be followed by the Radisys' document.
"The combined solution is heterogeneous in nature: the x86 takes care of application processing, control plane processing and management, while the network flow processor manages the packet- and flow-based network I/O subsystem."
See "The World of Secure, Virtualized Networking" - here.
"In a high-performance communication system, more than one type of processor is needed to keep up with the stringent requirements of packet processing, security and virtualization, especially at 10 Gbps and above. A typical communication system needs to be able to process packets and/or flows at all layers of the 7-Layer OSI model. x86 CPUs are an excellent choice for the application layer (L7) and control plane processing (see chart below)"
"Highly programmable network flow coprocessors designed to work closely with commodity x86-based systems is a perfect match for security appliances (see chart below)."
See also -
Labels:
Architecture,
DPI,
Netronome
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